Field of the Invention
The present disclosure generally relates to the field of semiconductor wafer processing technology. In particular, this disclosure relates to the design, fabrication, and manufacture of gallium arsenide (GaAs) integrated circuits.
Description of the Related Art
The use of GaAs substrates in the design and construction of integrated circuits has proven to have desirable effects. For example, GaAs substrates have been useful in achieving greater performance in power amplifier circuits. Typically, a GaAs integrated circuit will be used as a component in a larger circuit device or design. In order to be integrated into the circuit design, the GaAs integrated circuit is mechanically and electrically coupled to a printed circuit board for the circuit device. In other cases, the GaAs integrated device is mounted to other electronic devices.
Current processes for mounting a GaAs integrated circuit to a printed circuit board typically involves attaching a singulated GaAs die to a contact pad formed on the printed circuit board. The GaAs integrated circuit usually includes a gold contact layer which is adapted to couple with a die attach pad on the printed circuit board. Depositing the gold layer is a time-consuming and relatively inefficient process. Also, gold is an expensive material, increasing the cost for GaAs integrated circuit products. Finally, gold has a relatively high dissolution rate in solder, and therefore is not able to be soldered to the die attach pad of the device's printed circuit board. As such, the contact side of the GaAs integrated circuit is typically adhered to the die attach pad using a conductive adhesive, such as epoxy or solder paste. The use of conductive adhesive requires an additional manufacturing step, and also requires the use of larger pads to accommodate adhesive overflow. This requirement of excess dimensions limits the ability to further miniaturize components. However, even with these undesirable features, gold contact layer and conductive adhesive continue to be the standard material and procedure used for attaching GaAs integrated circuit dies to a substrate.
With increasing pressure to reduce the size of components in electronic devices, there is a need for reducing the required size of the die attach pad on a printed circuit board or other substrate. There is also a need for improved GaAs integrated circuits that employ less costly component materials and can be more efficiently manufactured. Furthermore, there is a need for improved processes and methods for manufacturing such GaAs integrated circuits.
Disclosed herein are embodiments of an electronic circuit device comprising a substrate, a die attach pad located on the substrate, and a GaAs integrated circuit die having a copper backside contact pad and having a footprint of approximately the same size as the die attach pad, the GaAs integrated circuit die being connected to the die attach pad by a solder layer, the solder layer being disposed between the copper backside contact pad and the die attach pad on the substrate in a manner such that the GaAs integrated circuit die self-aligns with the die attach pad after reflow of the solder layer.
In some embodiments, the electronic circuit can further comprise a barrier layer, said barrier layer being disposed between said copper backside contact pad and said solder layer. In some embodiments, said substrate can be a printed circuit board. In some embodiments, said solder barrier layer can comprise nickel. In some embodiments, said solder barrier layer can further comprise a palladium flash layer.
In some embodiments, thermal resistance of the solder layer can be at least 40% lower than thermal resistance of an epoxy layer. In some embodiments, the copper backside contact pad can have a thermal conductivity of approximately 4 W/cmK.
Also disclosed herein are embodiments of a GaAs integrated circuit incorporating the electronic circuit device described herein.
Disclosed herein are embodiments of a method for manufacturing a GaAs wafer assembly, said method comprising fabricating a GaAs wafer having a copper layer over a backside of the wafer, electroless plating a barrier layer over said copper layer, forming at least one singulated die from said GaAs wafer, and direct die soldering said at least one singulated die to a die attach pad on a substrate such that a solder layer is formed between the at least one singulated die and the die attach pad, the soldering performed in a manner such that the at least one singulated die self-aligns with the die attach pad after reflow of the solder layer.
In some embodiments, the method can further comprise forming a palladium flash layer over the copper layer. In some embodiments, said substrate can be a printed circuit board. In some embodiments, a surface area of said singulated die can be substantially equivalent to a surface area of said die attach pad.
Also disclosed herein are embodiments of a GaAs integrated circuit made in accordance with the method disclosed herein. In some embodiments, said GaAs integrated circuit can comprise through-wafer via at least partially filled with copper. In some embodiments, the electroless plating can cover more than 40% of the through-wafer via.
Also disclosed herein are embodiments of an electronic circuit module comprising a singulated GaAs integrated circuit die having a copper contact pad, a printed circuit board having a die attach pad, said die attach pad sized to receive the singulated GaAs integrated circuit die and having a footprint of approximately the same size as the singulated GaAs integrated circuit die, and a solder layer disposed between said copper contact pad of the die and said die attach pad of the printed circuit board, said copper contact pad of the singulated GaAs integrated circuit die attached to said die attach pad of the printed circuit board in a manner such that the singulated GaAs integrated circuit die self-aligns with the die attach pad after reflow of the solder layer.
In some embodiments, the module can further comprise a nickel layer, said nickel layer formed between said copper contact pad and said solder layer. In some embodiments, the module can further comprise a flash palladium layer, said flash palladium layer formed between said nickel layer and said copper contact pad and configured to act as a wetting layer for the solder layer. In some embodiments, the size of said die attach pad may not exceed the size of said singulated GaAs integrated circuit die by more than 150 microns in at least one direction. In some embodiments, said singulated GaAs integrated circuit die can be a radio frequency integrated circuit die.